S.No.

Name of the Candidates

Title of the Thesis

University

Year of Completion.

1:

Dr. Rakesh Kumar Saxena

Fast Computing Using Signed Digit Number

Rajeev Gandhi Prodhogik  Vishvidayalya Bhopal

May- 2016

S.No.

Name of the Candidates

Title of the Thesis

University

Year of Completion

1:

Dr. Yogesh Pratap

Analytical Modeling , Simulation & characterization of Scotty Barrier Gate All Around  MOSFET Structure for Low Power Applications

Delhi University

Nov -2015

2:

Dr. Jay Hind

Impact of Inner  Core Gate on Cylindrical Surrounding Gate MOSFET : Modeling , Simulation & Characterization

Delhi University

Dec - 2016

3:

Dr. Jaya Madan

Simulation & Analysis of Gate All Around Tunnel FET for High Performance Analog & R.F Applications.

Delhi Technical University

Dec - 2016

4:

Dr. Manoj Kumar

Analytical Modeling , Simulation & characterization of Schottky  Barrier Gate All Around MOSFET Structure for Low Power Applications.

Delhi University

June- 2017