Publications


 

List of Publications (2017-18)

S.No.

Faculty Name

International Journal

International Conference

Total

1

Prof.(Dr.)Neelam Sharma

1

1

2

2

Prof. R.S. Gupta

9

7

16

3

Dr. Sunil Kumar

0

2

2

4

Dr. K. L. Pushkar

5

0

5

5

Mr.Praween Kumar Sinha

0

1

0

6

Dr.Navneet Yadav

1

0

1

7

Dr.Javed Ahmad

0

1

1

8

Mr.H. Khanna

3

1

4

9

Ms.Abhilasha Gokhale

1

1

2

10

Ms.Divya Goyal

1

1

2

11

Mr.Nitin Sharma

3

0

3

12

Ms.Rajni

0

3

3

13

Ms.Sonam Rewari

3

0

3

14

Mr.Hemant Tulsani

1

1

2

15

Ms.Palak Chawla

1

1

2

16

Mr.Vaibhav

0

1

1

 

TOTAL

27

17

44

 

 

 

LIST OF PUBLICATIONS ECE DEPARTMENT (Academic year: 2017-18)

Papers in Reviewed Journal

  1. Reibhu Sant, Abhilasha Gokhale, Neelam Sharma, Ashutosh Pal, Kunadan Jha, “Design of Hybrid Signed Digit Adder for Fast Processing”, International Journal of Electronics, Electrical and Computational System, Volume 6, Issue 9, September 2017, ISSN2348-117X.
  2. Sonam Rewari, Vandana Nath,  Subhasis Haldar, S.S.Deswal, and R.S. Gupta, “A Novel Design to Improve Band to Band Tunneling and to reduce Gate   Induced Drain Leakages (GIDL) in Cylindrical Gate All Around (GAA) MOSFET”, Microsystem Technologies Journal, DOI 10.1007/s00542-017-3446-1,Sept. 2017.
  3. Sonam Rewari, Vandana Nath,  Subhasis Haldar, S.S.Deswal, and R.S. Gupta, “Hafnium Oxide Based Cylindrical Junctionless Double Surrounding Gate (CJLDSG) MOSFET for High Speed, High Frequency Digital and Analog Applications,” Microsystem Technologies Journal, DOI 10.1007/s00542-017-3436-3 Sept. 2017.
  4. Manoj Kumar, Subhasis Haldar, Mridula Gupta, and R. S. Gupta, “Analytical model of threshold voltage degradation due to localized charges in gate material        engineered schottky barrier cylindrical GAA MOSFET”, Semiconductor Science and Technology, vol. 13, pp. 105013105023, July 2016. (Impact Factor : 2.098).
  5. Manoj Kumar, Subhasis Haldar, Mridula Gupta, and R.S. Gupta, “Ambipolarity Reduction in DMG Asymmetric Vacuum Dielectric Schottky Barrier GAA MOSFET to Improve Hot Carrier Reliability”, Superlattices and Microstructures, April 2017 (Accepted, In press). (Impact Factor : 2.117).
  6. Manoj Kumar, Subhasis Haldar, Mridula Gupta, and R.S. Gupta, “Cylindrical Gate All Around Schottky Barrier MOSFET with Insulated Shallow Extensions at Source/Drain for Removal of Ambipolarity: A Novel Approach”, Journal of Semiconductors, June 2017 (Accepted, In press).
  7. NitinTrivedi, Manoj Kumar, Subhasis Haldar, S. S. Deswal, Mridula Gupta and R.S. Gupta, “Assessment of analog RF performance for insulated shallow         extension (ISE) cylindrical surrounding gate (CSG) MOSFET incorporation gate stack”, Microsystems and Technology, July, 2017. (Impact Factor : 0.974).
  8. Yogesh Pratap, Manoj Kumar, Sneha Kabra, Subhasis Haldar, R.S. Gupta and Mridula Gupta, “Analytical modeling of Junctionless transistor for biomolecule detection”, Journal    of Computational Electronics, 2017. (Impact Factor : 1.104).
  9. Nitin Trivedi, Manoj Kumar, Subhasis Haldar, S.S Deswal, Mridula Gupta and  R. S. Gupta, " Charge plasma technique based dopingless accumulation mode junction less cylindrical surrounding gate MOSFET: analog performance improvement", Journal of   Applied Physics A, Springer, Appl. Phys. A (2017) 123:564     DOI10.1007/s00339-017-1176-y.
  10. “Gate Induced Drain Leakage (GIDL) Reduction in Cylindrical Dual Metal Hetero Dielectric (DM-HD) Gate All Around (GAA) MOSFET,” Sonam Rewari, Vandana Nath,Subhasis    Haldar,  S.S.Deswal and R.S.Gupta , IEEE Transactions on Electron Devices vol. 65, No. 1, January2018. 
  11. K. L. Pushkar, Ghanshyam Singh and R. K. Goel, “CMOS VDIBAs-based Singl
  12. Resistance-Controlled Voltage-Mode Sinusoidal Oscillator,”    Circuits and Systems, vol. 8,no. 1, 2017. http://dx.doi.org/10.4236/cs.2017.81002, ISSN 2153-1293.
  13. K. L. Pushkar and D. R. Bhaskar “ New Single-Element-Controlled Sinusoidal Oscillator using Single VDIBA,” Journal of Engineering Technology, ISSN: 0747-9964, Vol. 4, Issue1.
  14. K. L. Pushkar and K. Gupta, “MISO-type voltage-mode universal biquadratic filter using single Universal Voltage Conveyor,” Circuits and Systems, ID:           7601237, 2017., ISSN2153-1293.
  15. K. L. Pushkar, “Electronically controllable sinusoidal oscillator employing DIBAs,”Advances in Electrical and Electronics Engineering, ISSN: 1804-3119, Vol. 15, Issue 2,2017. (Accepted)
  16. N. Yadav, "DWT-SVD-WHT watermarking using varying strength factor derived from means of the WHT coefficients," Arabian Journal of Science and Engineering (SCIE indexed,Impact factor 0.865), 2017.
  17. H. Khanna, M. Aggarwal and S. Ahuja, “Optimum Distance and Power allocation Strategies for Quantum-limited Inter-Relayed FSO Communication System,”AEU–International Journal of Electronics and Communications, DOI –10.1016/ j.aeue.2017.06.015, vol. 80, pp. 10-18, 2017.
  18. H. Khanna, M. Aggarwal and S. Ahuja, “On the end-to- end performance of a mixed RF-FSO link with a Decode and Forward relay, ”JournalofOptical Communications,DOI10.1515/joc-2017- 0077, ISSN (Online) 2191-6322, ISSN (Print) 0173-4911,    Jul. 2017.
  19. “Fast Adders: Timing, Layout and Cost Comparison”, Akshat Malik, Abhilasha Gokhale and Neelam Sharma, International Journal of Electronics, Electrical           and Computational System (IJEECS) ISSN 2348-117X, Volume 6, May 2017.
  20. Divya Goyal and Pragya Varshney. "CCII and RC fractance based fractional ordercurrentintegrator." MicroelectronicsJournal 65(2017):10.DOI10.1016/j.mejo.2017.05.002
  21. O.P.Verma, Nitin sharma, “Intensity preserving cast removal in color images using particle swarm optimization”,  Journal of Electrical and Computer Engineering, ISSN 2088­8708, Vol.7 No.5,2017.
  22. O.P.Verma, Nitin sharma, Efficient Color Cast Correction Based on Fuzzy Logic. In Journal of Engineering Science and Technology Review, Vol. 10    issue 3, 2017.
  23. Sharma, N., & Verma, O. P. Estimation of weighting distribution using Fuzzy memberships function and PSO in satellite image enhancement, Taylor and Francis,2017.
  24. Sonam Rewari, Vandana Nath,  Subhasis Haldar, S.S.Deswal, and R.S. Gupta, “A Novel Design to Improve Band to Band Tunneling and to reduce Gate   Induced Drain Leakages (GIDL) in Cylindrical Gate All Around (GAA) MOSFET”, Microsystem Technologies Journal, DOI 10.1007/s00542-017-3446-1, Sept. 2017.
  25. Sonam Rewari, Vandana Nath,  Subhasis Haldar, S.S.Deswal, and R.S. Gupta, “Hafnium Oxide Based Cylindrical Junctionless Double Surrounding Gate  (CJLDSG) MOSFET for High Speed, High Frequency Digital and Analog Applications,” Microsystem Technologies Journal, DOI 10.1007/s00542-017-3436-3  Sept. 2017.
  26. “Gate Induced Drain Leakage (GIDL) Reduction in Cylindrical Dual Metal Hetero Dielectric (DM-HD) Gate All Around (GAA) MOSFET,” Sonam Rewari, Vandana Nath, Subhasis Haldar,  S.S.Deswal and R.S.Gupta , IEEE Transactions on Electron Devices vol. 65, No. 1, January2018. 
  27. Hemant Tulsani, Palak Chawla, Rashmi Gupta, "A Novel Steganographic Model for Securing Binary Images", International Journal of Information Technology, Springer, 2017

Papers in International Conferences

  1. Reibhu Sant, Abhilasha Gokhale, Neelam Sharma, Ashutosh Pal, Kunadan Jha, “Design of Hybrid Signed Digit Adder for Fast Processing”, International           Conference on Science, Technology & Management (ICSTM-2017), 24th September, 2017, IETE, Bengaluru
  2. "Carrier concentration dependence f ballistic mobility and mean free path in a nano-dimensional InAlAs/InGaAs Single Gate HEMT" Neetika Sharma, Jyotika          Jogi, R. S. Gupta, UPCON-2016, 09-11 December, IIT BHU, Uttar Pradesh, India.
  3. "Theoretical Investigations of Junctionless Nan wire Transistor for High Reliability and Digital Applications" Nitin Trivedi, Manoj Kumar, Subhasis Haldar, S.S Deswal, Mridula Gupta and  R. S. Gupta, UPCON-2016, 09-11 December, IIT BHU, Uttar Pradesh, India.
  4. Nitin Trivedi, Manoj Kumar, Subhasis Haldar, S.S Deswal, Mridula Gupta and  R. S. Gupta, " Effect of Temperature on the Performance Analysis of Junctionless Accumulation Mode (JAM) Surrounding Gate MOSFET " IWPSD, IIT Delhi, 11-15 Dec., 2017.
  5. Nisha Chugh, Monika Bhattacharya, Manoj Kumar and  R. S. Gupta, “ Impact of Temperature and Al composition on the threshold voltage and sheet carrier concentration of AlmGa1-mN/GaN/ AlmGa1-mN Double Heterostructure HEMT” in IWPSD, IIT Delhi- Accepted and to be presented  in Dec, 2017.
  6. Nisha Chugh, Monika Bhattacharya, Manoj Kumar and  R. S. Gupta  "Sheet Carrier Concentration and  Threshold Voltage Modeling of Asymmetrically Doped AlGaN/GaN/AlGaN Double Heterostructure HEMT” in UPCON (IEEE Conference), held at GLA University, Mathura, Oct, 2017.
  7. Manjula Vijh, R.S. Gupta, Sujata Pandey, “GaN Based Tunnel Field Effect Transistor for Terahertz Applications” , PIERS 2017 in Singapore (Presented)
  8. Manjula Vijh, R.S. Gupta, Sujata Pandey, “Switching Characteristics of InN Tunnel Field Effect Transistor and Its Application in the Design of RF Amplifiers”, PIERS 2017 in Singapore (Presented)
  9. Sunil Mathur, Tapan Sharma, Dr. Vinod Shokeen "Best of Breed Solution for Clustering of Satellite Images Using Big data Platform Spark" International Conference on Inventive Communication and Computational Technologies (ICICCT 2017) 
  10. Dinesh Prasad, Javed Ahmad and Mayank Srivastava , “ New CM/VM 3 rd Order Quadrature oscillator Using VDCCs.,” 2017 IEEE International    Conference on Applied System Innovation (IEEE ICASI 2017) May 13-17,2017, Sapporo , Japan .
  11. Reibhu Sant, Abhilasha Gokhale, Neelam Sharma, Ashutosh Pal, Kunadan Jha, “Design of Hybrid Signed Digit Adder for Fast Processing”, International Conference on Science, Technology & Management (ICSTM-2017), 24th September, 2017, IETE, Bengaluru.
  12. Rajni and C.S.Rai, “Linear Phase Constrained Affine Projection Sign Algorithm” in International Conference on Electrical, Electronics, Computers, Communication, Mechanical and Computing (EECCMC), January,2018.
  13. Rajni and C.S.Rai, “PNLMS-Based Computational Cost Efficient Adaptive Algorithms for Sparse Channel Identification”, in International Conference on Electrical,Electronics,Computers, Communication, Mechanical and Computing (EECCMC), January,2018.
  14. Hemant Tulsani, Palak Chawla, Rashmi Gupta, ;Visual Cryptography and Integer Wavelet Transform based Watermarking for Securing Binary Images & quot;, IEEE International Conference on Computing for Sustainable Global Development, Mar. 2017.
  15. Hemant Tulsani, Palak Chawla, Rashmi Gupta, ;Visual Cryptography and Integer Wavelet Transform based Watermarking for Securing Binary Images & quot;, IEEE International Conference on Computing for Sustainable Global Development, Mar. 2017.
  16. Vaibhav, Davinder Miglani, Shivam Gupta, Karan Arora; Design of Low Power High Speed Current Comparator based flash ADCs ;IEEE International Conference on Computing for Sustainable Global Development, Mar. 2018.(Accepted for publication).

 

 

List of Publications (2016-17)

S.No.

Faculty Name

International Journal

International Conference

(2016-17)

1

Prof. (Dr.).Neelam Sharma

2

5

7

2

Prof. R.S. Gupta

11

9

20

3

Dr. Sunil Kumar

1

3

4

4

Dr. K. L. Pushkar

5

0

5

5

Mr. Praween Kumar Sinha

1

1

2

6

Dr. Navneet Yadav

1

0

1

7

Dr. Javed Ahmad

1

2

3

8

Mr. H. Khanna

3

1

4

9

Ms. Abhilasha Gokhale

1

4

5

10

Ms. Divya Goyal

1

2

3

10

Mr. Nitin Sharma

0

1

1

11

Ms. Alpana sahu

1

0

1

12

Ms. Sonam Rewari

3

5

8

13

Mr. Hemant Tulsani

1

2

3

14

Ms. Palak Chawla

1

1

2

15

Mr. Vaibhav

0

1

1

 

TOTAL

33

37

70

 

 

LIST OF PUBLICATIONS ECE DEPARTMENT (2016-2017)

 Papers in Reviewed Journal

  1. Praween Kumar Sinha, Himani Dhir, Neelam Sharma, Shubham Jindal “Realization Of Grounded Inductance And Capacitance Using Current Feedback Operational Amplifier And Its Application” International Journal of Electronics, Electrical and Computational System (IJEECS), ISSN 2348-117X, Volume 6, Issue 2, February 2017, Page 96-101.
  2. “Fast Adders: Timing, Layout and Cost Comparison”, Akshat Malik, Abhilasha Gokhale and Neelam Sharma, International Journal of Electronics, Electrical and Computational System (IJEECS) ISSN 2348-117X, Volume 6, May 2017.
  3. Sonam Rewari, Vandana Nath,  Subhasis Haldar, S.S.Deswal, and R.S. Gupta, "Improved Analog and AC Performance with Increased Noise Immunity using Nanotube Junctionless Field Effect Transistor (NJLFET)" Applied Physics A, vol. 123, No. 1, DOI: 10.1007/s00339-016-0583-9, Jan 2017.
  4. Sonam Rewari, Vandana Nath,  Subhasis Haldar, S.S.Deswal, and R.S. Gupta, “A Novel Design to Improve Band to Band Tunneling and to reduce Gate Induced Drain Leakages (GIDL) in Cylindrical Gate All Around (GAA) MOSFET”, Microsystem Technologies Journal,    DOI 10.1007/s00542-017-3446-1,  Sept. 2017.
  5. Sonam Rewari, Vandana Nath,  Subhasis Haldar, S.S.Deswal, and R.S. Gupta, “Hafnium Oxide Based Cylindrical Junctionless Double Surrounding Gate (CJLDSG) MOSFET for High Speed, High Frequency Digital and Analog Applications,” Microsystem Technologies   Journal, DOI 10.1007/ s00542-017-3436-3   Sept. 2017.
  6. Manoj Kumar, Subhasis Haldar, Mridula Gupta, and R. S. Gupta, “Analytical model of threshold voltage degradation due to localized charges in gate material engineered schottky barrier cylindrical GAA MOSFET”, Semiconductor Science and Technology, vol. 13, pp. 105013105023, July 2016. (Impact Factor : 2.098).
  7. Nitin Trivedi, Manoj Kumar, Subhasis Haldar, S. S. Deswal, Mridula Gupta and R. S. Gupta, “Analytical Modelling Simulation and Characterization of short channel Junctionless Accumulation Mode Surrounding Gate (JLAMSG) MOSFET for improved analog/RF performance”, Superlattices and Microstructures, vol. 100,pp.1271–1275,December 2016 (Impact Factor : 2.117).
  8. Manoj Kumar, Subhasis Haldar, Mridula Gupta, and R.S. Gupta, “Ambipolarity Reduction in DMG Asymmetric Vacuum Dielectric Schottky Barrier GAA     MOSFET to Improve Hot Carrier Reliability”, Superlattices and Microstructures, April 2017 (Accepted, In press). (Impact Factor : 2.117).
  9. Manoj Kumar, Subhasis Haldar, Mridula Gupta, and R.S. Gupta, “Cylindrical Gate All Around Schottky Barrier MOSFET with Insulated Shallow Extensions at Source/Drain for Removal of Ambipolarity: A Novel Approach”, Journal of Semiconductors, June 2017 (Accepted, In press).
  10. NitinTrivedi, Manoj Kumar, Subhasis Haldar, S. S. Deswal, Mridula Gupta and R.S. Gupta, “Assessment of analog RF performance for insulated shallow     extension (ISE) cylindrical surrounding gate (CSG) MOSFET incorporation gate stack”, Microsystem and Technology, (Accepted, In press) July, 2017. (Impact Factor : 0.974).
  11. Yogesh Pratap, Manoj Kumar, Sneha Kabra, Subhasis Haldar, R.S. Gupta and Mridula Gupta, “Analytical modeling of Junctionless transistor for biomolecule detection”, Journal of Computational Electronics, (Accepted, In press) 2017. (Impact Factor : 1.104).
  12. Nitin Trivedi, Manoj Kumar, Subhasis Haldar, S.S Deswal, Mridula Gupta and  R. S. Gupta, " Charge plasma technique based dopingless accumulation mode junction less cylindrical surrounding gate MOSFET: analog performance improvement", Journal of Applied Physics A, Springer, Appl. Phys. A (2017) 123:564 DOI 10.1007/s00339-017-1176-y.
  13. Sharma, A. Jain, Yogesh Pratap, and R. S Gupta, “Effect of High-k and Vacuum Dielectrics as Gate Stack on a Junctionless Cylindrical Surrounding Gate (JL-CSG) MOSFET,” Solid State Electronics, Vol. 123, pp. 26-32, September 2016.
  14. Panda, Jeebananda, Kaberi Nath,Shrikishan Choudhary, and Sunil Kumar, "A non-blind multiple transform based audio watermarking based on highest entropy sub-bands" International Journal of Scientific & Engineering Research, Volume 7, Issue 10,1899 ISSN       2229-5518, October 2016.
  15. K. L. Pushkar, R. K. Goel, Kavya Gupta et al., “New VD-DIBA-Based Single-Resistance-Controlled Sinusoidal Oscillator,” Circuits and Systems, vol. 7, no. 13, Nov.2016.http://dx.doi.org/10.4236/cs.2016.713341, ISSN 2153-1293
  16. K. L. Pushkar, Ghanshyam Singh and R. K. Goel, “CMOS VDIBAs-based Single-Resistance-Controlled Voltage-Mode Sinusoidal Oscillator,” Circuits and Systems, vol. 8,no. 1, 2017. http://dx.doi.org/10.4236/cs.2017.81002, ISSN 2153-1293.
  17. K. L. Pushkar and D. R. Bhaskar “ New Single-Element-Controlled Sinusoidal Oscillator using Single VDIBA,” Journal of Engineering Technology, ISSN: 0747-9964, Vol. 4, Issue1, (Accepted)
  18. K. L. Pushkar and K. Gupta, “MISO-type voltage-mode universal biquadratic filter using single Universal Voltage Conveyor,” Circuits and Systems, ID: 7601237, 2017., ISSN2153-1293
  19. K. L. Pushkar, “Electronically controllable sinusoidal oscillator employing VDIBAs,” Advances in Electrical and Electronics Engineering, ISSN: 1804-3119, Vol. 15, Issue 2,2017. (Accepted)
  20. N. Yadav, "DWT-SVD-WHT watermarking using varying strength factor derived from means of the WHT coefficients," Arabian Journal of Science and Engineering (SCIE indexed, Impact factor 0.865) Accepted recently.
  21. Dinesh Prasad, Javed Ahmad, and Mayank Srivastav, “A Novel Grounded To Floating Admittance Converter With Electronic Control,” Indian Journal Of Physics,Doi10.1007/s12648-017- 1077-0 (Springer).
  22. Realization Of Grounded Inductance And Capacitance Using current Feedback Operational Amplifier And Its Application Praween Kumar Sinha , Himani Dhir, Dr. Neelam Sharma, Shubham Jindal, International Journal of Electronics, Electrical and Computational System Volume 6, Issue 2 February 2017
  23. H. Khanna, M. Aggarwal and S. Ahuja, “Performance analysis of an inter-relay co-operation in FSO communication system,” Journal of Optical Communications, DOI -10.1515/joc-2016- 0115, ISSN (Online) 2191-6322, ISSN (Print) 0173-4911, Nov. 2016.
  24. H. Khanna, M. Aggarwal and S. Ahuja, “Optimum Distance and Power allocation Strategies   for Quantum-limited Inter-Relayed FSO Communication System,” AEU–International Journal          of Electronics and Communications, DOI –10.1016/j.aeue.2017.06.015, vol. 80, pp. 10-18,    2017.
  25. H. Khanna, M. Aggarwal and S. Ahuja, “On the end-to- end performance of a mixed RF-FSO link with a Decode and Forward relay, ” Journal of Optical Communications, DOI -        10.1515/joc-2017- 0077, ISSN (Online) 2191-6322, ISSN (Print) 0173-4911, Jul. 2017.
  26. “Fast Adders: Timing, Layout and Cost Comparison”, Akshat Malik, Abhilasha Gokhale and Neelam Sharma, International Journal of Electronics, Electrical and Computational System (IJEECS) ISSN 2348-117X, Volume 6, May 2017.
  27. Divya Goyal and Pragya Varshney. "CCII and RC fractance based fractional order current integrator." Microelectronics Journal 65 (2017): 1-10.DOI: 10.1016/j.mejo.2017.05.002
  28. Satyajit Banerjee, Mayank Gupta, Vaibhav Sharma, Alpana Sahu ‘LI-FI (Light fidelity) – An Implementation to future in Wireless communication’, SSRG International Journal of Electronics and Communication Engineering (SSRG-IJECE) – Volume 4, Issue 3, PP. 49-         55,March 2017.
  29. Sonam Rewari, Vandana Nath,  Subhasis Haldar, S.S.Deswal, and R.S. Gupta, "Improved Analog and AC Performance with Increased Noise Immunity using Nanotube Junctionless Field Effect Transistor (NJLFET)" Applied Physics A, vol. 123, No. 1, DOI: 10.1007/s00339-016-0583-9, Jan 2017.
  30. Sonam Rewari, Vandana Nath,  Subhasis Haldar, S.S.Deswal, and R.S. Gupta, “A Novel Design to Improve Band to Band Tunneling and to reduce Gate Induced Drain Leakages (GIDL) in Cylindrical Gate All Around (GAA) MOSFET”, Microsystem Technologies Journal, DOI 10.1007/s00542-017-3446-1,  Sept. 2017.
  31. Sonam Rewari, Vandana Nath,  Subhasis Haldar, S.S.Deswal, and R.S. Gupta, “Hafnium Oxide Based Cylindrical Junctionless Double Surrounding Gate (CJLDSG) MOSFET for        High Speed, High Frequency Digital and Analog Applications,” Microsystem Technologies   Journal, DOI 10.1007/s00542-017-3436-3   Sept. 2017.
  32. Hemant Tulsani, Palak Chawla, Rashmi Gupta, A Novel Steganographic Model for Securing Binary Images", International Journal of Information Technology, Springer, 2017
  33. Hemant Tulsani, Palak Chawla, Rashmi Gupta, "A Novel Steganographic Model for Securing Binary Images;, International Journal of Information Technology, Springer, 2017.

 

Papers in International Conferences

  1. Akshat Malik, Abhilasha Gokhale and Neelam Sharma, “Fast Computing using Redundant Binary Signed Digit Adders”, INDIACom-2017, 4 th International Conference on Computing    for Sustainable Global Development, 1st – 3rd March, 2017, BVICAM, Paschim Vihar, New Delhi.
  2. Akshat Malik, Abhilasha Gokhale and Neelam Sharma, “Performance Analysis of Signed Digit Adders”, 3 rd International Conference on VLSI,    Communication and Network (VCAN-2017), 10 th – 11 th March, 2017, IET, Alwar.
  3. Reibhu Sant, Neelam Sharma and Abhilasha Gokhale, “Energy Crisis and the Next Step Forward”, 3 rd International Conference on VLSI, Communication and Network (VCAN-2017), 10 th – 11 th March, 2017, IET, Alwar.
  4. Akshat Malik, Abhilasha Gokhale and Neelam Sharma, “Fast Adders: Timing, Layout and Cost Comparison”, 5 th International Conference on Engineering and Technology,Science      and Management Innovation (ICETSMI - 2017), 30 th April, 2017, IETE, Lodhi Road, New  Delhi.
  5. Praween Kumar Sinha, Neelam Sharma “Design of Two stage CMOS op-amp with low power and high Slew Rate” Published in Proceedings of International Conference on “VLSI, Communication and Networks” held on 10-11 March 2017 at IET, Alwar , India.
  6. Triple Metal Gate All Around MOSFET (TMGAA) for DNA Molecule and Neutral Species Detection", Sonam Rewari, Vandana Nath, Subhasis Haldar, S.S.Deswal, R.S.Gupta, ICANN-2016, 4-5 November, Jamia Miliya Islamiya, New Delhi.
  7. “GaN based Junctionless Double Surrounding Gate (JLDSG) MOSFET for Sub millimeter wave Applications”, Sonam Rewari, Vandana Nath, Subhasis Haldar, S. S. Deswal, and R. S. Gupta, APMC 2016,Hotel Pullman, Delhi 5-9 December, 2016.
  8. Optimized performance of GaN based Junctionless MOSFET at Cryogenic Temperature”, Sonam Rewari, Vandana Nath, Subhasis Haldar, S. S. Deswal, and R. S. Gupta, NCRDE 2017,University of Delhi 17-18 February, 2017.

“Dual Metal Gate All Around MOSFET to Improve Band to Band Tunneling and to reduce Gate Induced Drain Leakages (GIDL) in Cylindrical Gate All Around (GAA) MOSFET,” Sonam Rewari, Vandana Nath, Subhasis Haldar,  S.S.Deswal and R.S.Gupta , 2nd International DEVIC conference, 23-24 March, 2017, Kalyani City, West Bengal, India.

  1. A Numerical Model of GaN based Cylindrical Junctionless Gate All Around MOSFET for Sub threshold region at Cryogenic Temperatures,” Sonam Rewari, Vandana Nath, Subhasis Haldar,  S.S.Deswal and R.S.Gupta, 2nd International DEVIC conference, 23-24     March, 2017, Kalyani City, West Bengal, India.
  2. Nitin Trivedi, Manoj Kumar, Subhasis Haldar , S. S. Deswal, Mridula Gupta, R. S. Gupta, Assessment of Analog RF performance for Insulated Shallow    Extension (ISE) Cylindrical Surrounding Gate All Around (GAA) MOSFET  Incorporating Gate Stack", pp. 391-394, ISBN :978-93-80813-45-5, International Conference on Microelectronics Circuit and System, Kolkata , July 9-10, 2016.
  3. Manoj Kumar, Subhasis Haldar, Mridula Gupta and R.S. Gupta, “Gaussian Graded Channel (GGC) Schottky Barrier Surrounding Gate MOSFET for Analog/RF Performance Enhancement”, International Conference on Advance in Nan materials and Nanotechnology (ICANN, Delhi, India), November 4-5, 2016.
  4. Nitin Trivedi, Manoj Kumar, Subhasis Haldar, S.S Deswal, Mridula Gupta and  R. S. Gupta, Enhanced Analog/RF performance of Underlap Cylindrical Gate All Around MOSFET with high-k Dielectric Material Spacer", International Conference on Advance in Nan materials and Nanotechnology (ICANN, Delhi,    India), November 4-5, 2016.
  5. Nitin Trivedi, Manoj Kumar, Subhasis Haldar, S.S Deswal, Mridula Gupta and  R. S. Gupta, " Investigation of Analog/RF performance of High-k Spacer Junctionless Accumulation-Mode Cylindrical Gate All Around (JLAM-CGAA) MOSFET" .UPCON-2016, IIT BHU, 9-11 Dec 2016 ElectronicISBN:978-1-5090-5384-1ISBN:978-1-5090-5385-8,DOI:10.1109/UPCON.2016.7894652.
  6. Sunil Mathur, Tapan Sharma, Dr. Vinod Shokeen "Best of Breed Solution for Clustering of Satellite Images Using Big data Platform Spark" International Conference on Inventive Communication and Computational Technologies (ICICCT 2017) .
  7. Tapan Sharma, Vinod Shokeen, Sunil Kumar, "Performance Comparison of Edge Detection Algorithms for Satellite Images using Big data Platform Spark" IEEE Conference DTU, August2016.
  8. Sunil Kumar, Jeebananda Panda, Shrikishan Choudhary, Kaberi Nath , "Audio Zero Watermarking Scheme based on Sub band Mean Energy Comparison Using DWT-DCT" International Conference on Signal Processing and Communication, December 2016.
  9. Design of Two stage CMOS op-amp with low power and high Slew Rate Praween Kumar Sinha, Dr. Neelam Sharma, VLSI, Communication and Networks 10-11 March 2017.
  10. Dinesh Prasad, Javed Ahmad and Mayank Srivastava , “ New CM/VM 3 rd Order Quadrature oscillator Using VDCCs.,” 2017 IEEE International Conference on Applied System Innovation (IEEE ICASI 2017) May 13-17,2017, Sapporo , Japan .
  11. Ahmad Javed, Prasad Dinesh, Srivastava Mayank and Laxya, “New VDVTA Based Electronically Tunable Floating Inductor Simulator,” 1st IEEE International Conference on Power Electronics, Intelligent Control and Energy Systems (ICPEICES-2016). doi: 10.1109/ICPEICES.2016.7853466.
  12. H. Khanna, M. Aggarwal and S. Ahuja, “Outage analysis of a variable-gain amplify and      forward relayed mixed RF-FSO system,” in conference proceedings of INDICON, IEEE annual India conference, Bengaluru, DOI-10.1109/INDICON.2016.7839140, ISSN: 2325-9418, 16-18 Dec., 2016.
  13. “Fast Computing using Redundant Binary Signed Digit Adders”, Akshat Malik, Abhilasha Gokhale and Neelam Sharma, INDIACom-2017, 4 th International Conference on           Computing for Sustainable Global Development, 1st – 3rd March, 2017, BVICAM, Paschim         Vihar, New Delhi.
  14. “Performance Analysis of Signed Digit Adders”, Akshat Malik, Abhilasha Gokhale and Neelam Sharma, 3 rd International Conference on VLSI,    Communication and Network       (VCAN-2017), 10 th– 11 th March, 2017, IET, Alwar.
  15. “Energy Crisis and the Next Step Forward”, Reibhu Sant, Neelam Sharma and Abhilasha Gokhale, 3 rd International Conference on VLSI, Communication and Network (VCAN-2017), 10 th – 11 th March, 2017, IET, Alwar.
  16. “Fast Adders: Timing, Layout and Cost Comparison”, Akshat Malik, Abhilasha Gokhale and Neelam Sharma, 5 th International Conference on Engineering and Technology,        Science and Management Innovation (ICETSMI - 2017), 30 th April, 2017, IETE, Lodhi Road, New Delhi.
  17. Divya Goyal and Pragya Varshney, "DVCCTA based PID controller with grounded passive elements, & quot; 2016 Second International Innovative Applications of Computational Intelligence on Power, Energy and Controls with their Impact on Humanity (CIPECH), KIET Ghaziabad, 2016, pp. 41-45.
  18. Divya Goyal and Pragya Varshney;CCII based realizations of Half order PI Controller; presented in 2017 4th International conference on Computing for Sustainable Global Development, Delhi, March 2017.
  19. Nitin Sharma,, and Om Prakash Verma. "A Novel Fuzzy Based Satellite Image Enhancement." In Proceedings of International Conference on Computer Vision    and Image Processing, pp. 421-428. Springer, Singapore, 2017.
  20. "Triple Metal Gate All Around MOSFET (TMGAA) for DNA Molecule and Neutral Species Detection", Sonam Rewari, Vandana Nath, Subhasis Haldar, S.S.Deswal, R.S.Gupta, ICANN-2016, 4-5 November, Jamiya Miliya Islamiya, New Delhi.
  21. GaN based Junctionless Double Surrounding Gate (JLDSG) MOSFET for Submillimeter wave Applications”, Sonam Rewari, Vandana Nath, Subhasis Haldar, S. S. Deswal, and R. S. Gupta, APMC 2016,Hotel Pullman, Delhi 5-9 December, 2016.
  22. Optimized performance of GaN based Junctionless MOSFET at Cryogenic Temperature”, Sonam Rewari, Vandana Nath, Subhasis Haldar, S. S. Deswal, and R. S. Gupta,       NCRDE 2017,University of Delhi 17-18 February, 2017.
  23. Dual Metal Gate All Around MOSFET to Improve Band to Band Tunneling and to reduce Gate Induced Drain Leakages (GIDL) in Cylindrical Gate All Around (GAA) MOSFET,” Sonam Rewari, Vandana Nath, Subhasis Haldar,  S.S.Deswal and R.S.Gupta , 2nd International DEVIC conference, 23-24 March, 2017, Kalyani City, West Bengal, India.
  24. A Numerical Model of GaN based Cylindrical Junctionless Gate All Around MOSFET for Sub threshold region at Cryogenic Temperatures,” Sonam Rewari, Vandana Nath,        Subhasis Haldar,  S.S.Deswal and R.S.Gupta, 2nd International DEVIC conference, 23-24         March, 2017, Kalyani City, West Bengal, India.
  25. Hemant Tulsani, Palak Chawla, Rashmi Gupta, ;Visual Cryptography and Integer Wavelet Transform based Watermarking for Securing Binary Images", IEEE International Conference on Computing for Sustainable Global Development, Mar. 2017.
  26. Hemant Tulsani, Palak Chawla, Rashmi Gupta, ;Visual Cryptography and Integer Wavelet Transform based Watermarking for Securing Binary Images", IEEE International Conference on Computing for Sustainable Global Development, Mar. 2017.
  27. Vaibhav, Hemant Tulsani;Low Power High Speed Current Conveyor based Current Comparator, Mirror Circuit and Encoder used in ADCs ;, IEEE International Conference on Computing for Sustainable Global Development, Mar. 2017.

 

List of Publication (2015-16)

S.No.

Faculty Name

International Journal

International Conference

Total

1

Prof. (Dr). Neelam Sharma

4

1

5

2

Prof. R.S. Gupta

10

9

19

3

Mr. Praween Kumar Sinha

4

0

4

4

Ms. Sonam Rewari

1

3

4

5

Ms. Shalu Garg

1

0

1

6

Mr.  Neeraj

1

0

1

7

Mr. Hement Tulsani

0

1

1

Total

21

14

35

 

 

Papers in Reviewed Journal

  1. Rakesh Kumar Saxena, Neelam Sharma, A.K Wadhwani “Performance Analysis of Various Universal Logic Redentant Adders”  International journal of Engineering Research & Technology (IJERT), ISSN: 2278-0181, Vol - 4, Issue 8, Aug., 2015.
  2. Abhinandan Aggarwall, Gagandeep Singh, Neelam Sharma “Implementation of AES algorithm” International Journal of Engineering Research & Science (IJOER), ISSN, (2395-6992), Vol-2, Issue-4, April – 2016, Page 112.
  3. Praween Kumar Sinha, Neelam Sharma, Rohit Mishra “A Configuration for Realizing Voltage Controlled Floating Inductance and Its Application” Circuit & Systems Scientific Research Publications (USA), Vol 6, PP 189-199, 2015.
  4. Praween Kumar Sinha, Neelam Sharma, Simran Agarwal, Sudipto Saha “CFOA based          Bandpass and Bandstop Ladder  Filter – A New Configuration” Circuit         & Systems, Scientific Research Publishing, Dec.2015.
  5. “Analytical Drain Current Formulation for Gate Dielectric Engineered Dual Material Gate-Gate All Around-Tunneling Field Effect Transistor,” Jaya Madan, R.S Gupta, Rishu Chaujar, Japanese Journal of Applied Physics (JJAP), Volume 54, no. 9 August 2015. (In press)
  6. Localised Charge Dependent Threshold Voltage Analysis of Gate Material Engineered   Junctionless Nana wire Transistor,” Yogesh Pratap, S. Haldar, R. S. Gupta and Mridula    Gupta, IEEE Transactions on Electron Device, Vol. 62, no. 8, pp. 2598-2605, (August) 2015.
  7. Capacitance Modeling of Gate Material Engineered Cylindrical/Surrounded Gate MOSFETs      for Sensor Applications,” Jay Hind Kumar Verma, Yogesh Pratap, Subhasis Haldar, R.       S. Gupta and Mridula Gupta, Superlattices and Microstructures Journal, Volume 88, pp.    271–280, (December) 2015.
  8. Modeling and Simulation of Cylindrical Surrounding Double Gate MOSFET for Enhanced Electrostatic Integrity,” Jay Hind Kumar Verma, Subhasis Haldar, R. S. Gupta and Mridula Gupta Superlattices and Microstructures Journal vol. 88, pp 354-364, Dec 2015.
  9. DS-Schottky Barrier Cylindrical GAA MOSFET: Nan sensor for Biochips,” Manoj Kumar, Subhasis Haldar, Mridula Gupta and R.S. Gupta, Nan materials       and Energy Journal, vol. 5, issue 1, Jan. 2016.
  10. Analytical Modeling of Junctionless Accumulation Mode Cylindrical Surrounding Gate    MOSFET (JAM-CSG)", International Journal of Numerical Modelling, Nitin Trivedi, Manoj          Kumar, Subhasis Haldar, S. S. Deswaal, and R.S. Gupta, DOI: 10.1002/jnm.2162, 2016.
  11. Numerical Modeling of Sub threshold Region of Junctionless Double Surrounding Gate    MOSFET (JDSG) ,” Sonam Rewari,  Subhasis Haldar,  Vandana    Nath, S.S. Deswal, and R.S. Gupta. Superlattices and Microstructures Journal, vol. 90, pp 8-19, Dec 2015.
  12. Physics based analytical model for surface potential and sub threshold current of cylindrical schottky barrier Gate All Around MOSFET with High-k Gate stack", Manoj Kumar,  Subhasis Haldar, Mridula Gupta, and R.S. Gupta. Superlattices and Microstructures Journal, vol. 90, pp 215-226, Jan. 2016.
  13. Physics-based drain current modeling of gate-all-around junction less nanowire twin-gate transistor (JN-TGT) for digital applications", Yogesh Pratap, S. Haldar, R. S. Gupta and Mridula Gupta, Journal of Computational Electronics, 10.1007/s10825-016-0798-1, pp 1-10,2016.
  14. Gate Material Engineered Junctionless Nanowire Transistor (JNT) with Vacuum Gate Dielectric for Enhanced Hot Carrier Reliability,” Yogesh Pratap, S.       Haldar,R.S. Gupta and Mridula Gupta, IEEE Transactions on Device and Materials Reliability, 2016. DOI: 10.1109/TDMR.2016.2583262 .
  15. Praween K. Sinha, Neelam Sharma, Simran Agarwal, Sudipto Saha “CFOA Based Band Stop Ladder Filter – A New Configuration”  published in http://www.scirp.org/journal/cs,    ISSN(Print): 2153-1285, ISSN(Online): 2153-1293,Vol - 7 Page 29-42.
  16. Praween Kumar Sinha, Neelam Sharma, Rohit Mishra “A configuration for Realizing Voltage Controlled Floating Inductance and Its Application” Circuit and Systems, Scientific Research Publishing, ISSN (Online): 2153-1293, ISSN (Print): 2153-1285 Vol - 6, Page 189-199, Sep. 2015.
  17. Praween Kumar Sinha, Neelam Sharma, Simran Agarwal, Sudipto Saha “CFOA based          band pass and band stop ladder filter-a new configuration” Circuit & Systems Scientific Research Publications (USA), Vol 7, PP 29-42, 2016
  18. Praween Kumar Sinha, Neelam Sharma, Rohit Mishra “A Configuration for Realizing Voltage Controlled Floating Inductance and Its Application” Circuit & Systems Scientific   Research Publications (USA), Vol 6, PP 189-199, 2015.
  19. Paramvir Rathee, Neeraj , Shalu garg,"Comparative analysis of wavelet domain techniques for image stenography.". (IJAIR2016)VOLUME 5 ISSUE 4.pg-622-627,2016.
  20. Paramvir Rathee, Neeraj, " A Survey on different wavelet transform in stenography".(IJAIR 2016),VOL 4 ISSUE 5 PG 268-271,2016.
  21. Paramvir Rathee, Neeraj , Shalu garg,"Comparative analysis of wavelet domain techniques for image stenography.". (IJAIR2016)VOLUME 5 ISSUE 4.pg-622-627,2016.
  22. Numerical Modeling of Sub threshold Region of Junctionless Double Surrounding Gate    MOSFET (JDSG) ,” Sonam Rewari,  Subhasis Haldar,  Vandana Nath, S.S. Deswal, and         R.S.Gupta. Superlattices and Microstructures Journal, vol. 90, pp 8-19, Dec 2015.

 

International conference

 

  1. Nikita Sharma, Neelam Sharma, “Low Power CMOS VLSI Design: Implementation of Comparator Circuits using the Novel Technique” Gyanodyan-2015” Changing Technological and Managerial Scenario: Aspects and Prospects. ISBN:978-93-84869-94-6, November 2015.
  2. Impact of Heterogeneous Gate Dielectric and Gate Metal Engineering on Analog and RF Performance of GAA TFET,”Jaya Madan, R.S. Gupta and Rishu Chaujar, 2015 International Conference on Solid State Devices and Materials (SSDM), Japan, 27-30th September, 2015.
  3. CSDG MOSFET: An advance novel architecture for CMOS technology", Jay Hind Kumar Verma, Yogesh Pratap, S. Haldar, R.S. Gupta and Mridula Gupta, (INDICON-2015), 17-20th December-2015, Jamia Millia Islamia, New Delhi, India.
  4. Impact of asymmetric gat stack on a Junctionless CSG MOSFET for enhanced Hot Carrier Reliability", Anirudh, Arushi, Yogesh Pratap, and R.S. Gupta, (INDICON-2015), 17-20th December-2015, Jamia Millia Islamia, New Delhi, India.
  5. AC analysis of Junctionless Double Surrounding Gate MOSFT for tetra hertz applications", Sonam Rewari, Vandana Nath, S.S Deswal and R.S. Gupta, ICCTICT, GGSIPU, 11-13 March 2016 , Delhi, India.
  6. DMG Insulated Shallow Extension Cylindrical GAA Schottky Barrier MOSFET for Removal of Ambipolarity: A Novel approach” Manoj Kumar, Yogesh           Pratap Subhasis Haldar, Mridula Gupta and R.S. Gupta, IEEE INEC 2016, Chengdu, China, May 9 –11, 2016.
  7. Sensitivity Investigation of Gate All Around Junctionless Transistor for Hydrogen Gas Detection”, Yogesh Pratap, Manoj Kumar, S. S. Deswal, Subhasis Haldar, R.S. Gupta and Mridula Gupta, IEEE INEC 2016, Chengdu, China, May 9 –11, 2016.
  8. Assessment of Analog RF performance for Insulated Shallow Extension (ISE) Cylindrical Surrounding Gate All Around (GAA) MOSFET  Incorporating Gate Stack", Nitin Trivedi, Manoj Kumar, Subhasis Haldar , S.S Deswal, Mridula Gupta , R. S. Gupta  pp. 391-394, ISBN           :978-93-80813-45-5, International Conference on microelectronics circuit and system,     Kolkata , July 2016.
  9. An Novel Design to Improve Band to Band Tunneling and to reduce Gate Induced Drain         Leakages (GIDL) in Cylindrical Gate All Around (GAA) MOSFET,” Sonam Rewari, Vandana Nath, Subhasis Haldar,  S.S.Deswal and R.S.Gupta , 3rd  International Conference on Microelectronics, Circuits and Systems, Micro2016, 9-10 July, Kolkata, India.
  10. Hafnium Oxide Based Cylindrical Junctionless Double Surrounding Gate (CJLDSG) MOSFET for High Speed, High Frequency Digital and Analog Applications,” Sonam Rewari, Vandana Nath, Subhasis Haldar,  S.S.Deswal and R.S.Gupta, 3rd  International Conference on Microelectronics, Circuits and Systems, Micro2016, 9-10 July, Kolkata, India.
  11. Hemant Tulsani and Rashmi Gupta. "Wavelet based optimized polynomial threshold function for ECG signal demising." Computing for Sustainable Global Development (Indicator), 2015 2nd International Conference on. IEEE, 2015.
  12. TCAD Assessment of Oxide Impact on Linearity and Harmonic Distortions in Gate All Around (GAA) MOSFET,” Akansha Goyal, Sonam Rewari, S.S.Deswal and R.S.Gupta,  3rd  International Conference on Microelectronics, Circuits and Systems, Micro2016, 9-10 July, Kolkata, India.
  13. An Novel Design to Improve Band to Band Tunneling and to reduce Gate Induced Drain         Leakages (GIDL) in Cylindrical Gate All Around (GAA) MOSFET,”    Sonam Rewari, Vandana Nath, Subhasis Haldar,  S.S.Deswal and R.S.Gupta , 3rd  International Conference on Microelectronics, Circuits and Systems, Micro2016, 9-10 July, Kolkata, India.
  14. AC analysis of Junctionless Double Surrounding Gate MOSFT for tetra hertz applications", Sonam Rewari, Vandana Nath, S.S Deswal and R.S. Gupta, ICCTICT, GGSIPU, 11-13 March 2016 , Delhi, India.